From b17f3d3d3cdd215edcff492699c744a4c85908d0 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Thu, 24 Oct 2019 00:19:45 +0200 Subject: soc,mb/intel: clean up remaining FSP2.0 socs/boards MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove CONFIG_...FSP2.0 based if-switches from FSP2.0-only socs/boards Change-Id: Iae92dc2e2328b14c78ac686aaf326bd68430933b Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/36279 Reviewed-by: Michael Niewöhner Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/soc/intel/icelake/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/icelake/Makefile.inc') diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index 15f7030ba0..80dcdc118c 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -48,7 +48,7 @@ ramstage-y += memmap.c ramstage-y += p2sb.c ramstage-y += pmc.c ramstage-y += pmutil.c -ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c +ramstage-y += reset.c ramstage-y += smmrelocate.c ramstage-y += spi.c ramstage-y += systemagent.c -- cgit v1.2.3