From af27ac26b34216f4a188ee1738825177d469cf48 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 18 Feb 2022 00:44:15 +0530 Subject: soc/intel: Move `pmc_clear_pmcon_sts()` into IA common code This patch moves `pmc_clear_pmcon_sts` function into common code and remove SoC specific instances. Accessing PMC GEN_PMCON_A register differs between different Intel chipsets. Typically, there are two possible ways to perform GEN_PMCON_A register programming (like `pmc_clear_pmcon_sts()`) as: 1. Using PCI configuration space when GEN_PMCON_A is a PCI configuration register. 2. Using MMIO access when GEN_PMCON_A is a memory mapped register. SoC users to select `SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION` Kconfig to perform GEN_PMCON_A register programming using PMC MMIO. BUG=b:211954778 TEST=Able to build brya. Signed-off-by: Subrata Banik Change-Id: I8d15f421c128630f928a1b6a7e2840056d68d7b1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62064 Tested-by: build bot (Jenkins) Reviewed-by: Jeff Daly Reviewed-by: Tim Wawrzynczak Reviewed-by: Lean Sheng Tan --- src/soc/intel/icelake/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/icelake/Kconfig') diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index ae693a4c4f..d8845513b6 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -56,6 +56,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_FSP_RESET select SOC_INTEL_COMMON_PCH_BASE select SOC_INTEL_COMMON_RESET + select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION select SSE2 select SUPPORT_CPU_UCODE_IN_CBFS select TSC_MONOTONIC_TIMER -- cgit v1.2.3