From 30eda3edd72f70b3ff7ef46f5cb6e0e346683062 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sun, 16 Nov 2014 20:28:57 -0700 Subject: fsp_baytrail: remove register option for TSEG size Set the UPD entry based on the Kconfig value instead of having two separate places that the value needs to be set. Change-Id: I3d32111b59152d0a8fc49e15320c7b5a140228a6 Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/7490 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones Reviewed-by: FEI WANG --- src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/fsp_baytrail/fsp') diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c index 6212966a0f..c6b5f9cffe 100644 --- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c @@ -33,6 +33,7 @@ #include #include #include +#include #ifdef __PRE_RAM__ #include @@ -116,8 +117,7 @@ static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U (config->PcdeMMCBootMode != EMMC_FOLLOWS_DEVICETREE)) UpdData->PcdeMMCBootMode = config->PcdeMMCBootMode; - if (config->PcdMrcInitTsegSize != TSEG_SIZE_DEFAULT) - UpdData->PcdMrcInitTsegSize = config->PcdMrcInitTsegSize - 1; + UpdData->PcdMrcInitTsegSize = smm_region_size() >> 20; printk(FSP_INFO_LEVEL, "GTT Size:\t\t%d MB\n", UpdData->PcdGttSize); printk(FSP_INFO_LEVEL, "Tseg Size:\t\t%d MB\n", UpdData->PcdMrcInitTsegSize); -- cgit v1.2.3