From 45022ae056cdbf58429b77daf2da176306312801 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Mon, 1 Oct 2018 19:17:11 +0200 Subject: intel: Use CF9 reset (part 1) Add SOUTHBRIDGE_INTEL_COMMON_RESET for all Intel platforms that used to perform a "system reset" in their hard_reset() implementation. Replace all duplicate CF9 reset implementations for these platforms. Change-Id: I8e359b0c4d5a1060edd0940d24c2f78dfed8a590 Signed-off-by: Patrick Rudolph Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/28862 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/fsp_baytrail/Makefile.inc | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/soc/intel/fsp_baytrail/Makefile.inc') diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc index 0cf99dea4c..d8c4f71c32 100644 --- a/src/soc/intel/fsp_baytrail/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/Makefile.inc @@ -45,8 +45,6 @@ romstage-y += gpio.c romstage-y += pmutil.c ramstage-y += pmutil.c ramstage-y += southcluster.c -romstage-y += reset.c -ramstage-y += reset.c ramstage-y += cpu.c ramstage-y += acpi.c ramstage-y += lpe.c -- cgit v1.2.3