From 73a22edcc8894c34df1234ae02d5318f18e3f7b8 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 5 Apr 2021 12:26:51 +0200 Subject: soc/intel: Fix typo in comment MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit rotine ---> routine Change-Id: I21a71f52d2ec7a05ea3dadf30e8f3e8dac07d168 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/52106 Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer Reviewed-by: Michael Niewöhner --- src/soc/intel/elkhartlake/chip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/elkhartlake') diff --git a/src/soc/intel/elkhartlake/chip.c b/src/soc/intel/elkhartlake/chip.c index b14edd6cc6..3917ea0af8 100644 --- a/src/soc/intel/elkhartlake/chip.c +++ b/src/soc/intel/elkhartlake/chip.c @@ -98,7 +98,7 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; -- cgit v1.2.3