From 4ed9f9a507a8b3419bc45431b8f1afb02c728a9e Mon Sep 17 00:00:00 2001
From: Subrata Banik <subrata.banik@intel.com>
Date: Sat, 31 Oct 2020 22:01:55 +0530
Subject: soc/intel: Use of common reset code block

This patch removes all redundant reset code block from each SoC
and make use of common reset code block(fsp_reset.c) based on
SOC_INTEL_COMMON_FSP_RESET.

Respective SoC Kconfig to choose correct FSP global reset type as
per FSP integration guide.

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I71531f4cf7a40efa9ec55c48c2cb4fb6ea90531f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/soc/intel/elkhartlake/Kconfig |  2 ++
 src/soc/intel/elkhartlake/reset.c | 17 -----------------
 2 files changed, 2 insertions(+), 17 deletions(-)

(limited to 'src/soc/intel/elkhartlake')

diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 05077ad316..f833178075 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -16,6 +16,7 @@ config CPU_SPECIFIC_OPTIONS
 	select CPU_SUPPORTS_PM_TIMER_EMULATION
 	select FSP_COMPRESS_FSP_S_LZ4
 	select FSP_M_XIP
+	select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
 	select GENERIC_GPIO_LIB
 	select HAVE_FSP_GOP
 	select INTEL_DESCRIPTOR_MODE_CAPABLE
@@ -50,6 +51,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_SMM
 	select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
 	select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+	select SOC_INTEL_COMMON_FSP_RESET
 	select SOC_INTEL_COMMON_PCH_BASE
 	select SOC_INTEL_COMMON_RESET
 	select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/elkhartlake/reset.c b/src/soc/intel/elkhartlake/reset.c
index fe3d7690b5..bc5815ac7a 100644
--- a/src/soc/intel/elkhartlake/reset.c
+++ b/src/soc/intel/elkhartlake/reset.c
@@ -1,12 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <cf9_reset.h>
-#include <console/console.h>
-#include <fsp/util.h>
 #include <intelblocks/cse.h>
 #include <intelblocks/pmclib.h>
 #include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
 
 void do_global_reset(void)
 {
@@ -18,17 +15,3 @@ void do_global_reset(void)
 	pmc_global_reset_enable(1);
 	do_full_reset();
 }
-
-void chipset_handle_reset(uint32_t status)
-{
-	switch (status) {
-	case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
-		printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
-		global_reset();
-		break;
-	default:
-		printk(BIOS_ERR, "unhandled reset type %x\n", status);
-		die("unknown reset type");
-		break;
-	}
-}
-- 
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