From 02275be61e442e022101b322279940fb0e74f7a8 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Thu, 12 Nov 2020 23:50:37 +0100 Subject: soc/intel/{icl,tgl,jsl,ehl}: enable ACPI CPPC entries MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable CPPC entries generation, needed for Intel SpeedShift. This can be tested by checking sysfs in Linux: $ grep . /sys/devices/system/cpu/cpu?/acpi_cppc/*perf The output should look like this, while the values may differ: /sys/devices/system/cpu/cpu0/acpi_cppc/highest_perf:28 /sys/devices/system/cpu/cpu0/acpi_cppc/lowest_nonlinear_perf:5 /sys/devices/system/cpu/cpu0/acpi_cppc/lowest_perf:1 /sys/devices/system/cpu/cpu0/acpi_cppc/nominal_perf:24 /sys/devices/system/cpu/cpu1/acpi_cppc/highest_perf:28 /sys/devices/system/cpu/cpu1/acpi_cppc/lowest_nonlinear_perf:5 ... Change-Id: I910b4e17d4044f1bf1ecfa0643ac62fc7a8cb51b Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/47543 Tested-by: build bot (Jenkins) Reviewed-by: Lance Zhao Reviewed-by: Felix Singer Reviewed-by: Sheng Lean Tan --- src/soc/intel/elkhartlake/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/elkhartlake/Kconfig') diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig index 12b0416009..fce2f903d4 100644 --- a/src/soc/intel/elkhartlake/Kconfig +++ b/src/soc/intel/elkhartlake/Kconfig @@ -34,6 +34,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_ACPI + select SOC_INTEL_COMMON_BLOCK_ACPI_CPPC select SOC_INTEL_COMMON_BLOCK_ACPI_GPIO select SOC_INTEL_COMMON_BLOCK_ACPI_LPIT select SOC_INTEL_COMMON_BLOCK_ACPI_PEP -- cgit v1.2.3