From 3286848a7a013b4d4effc4e50b4b7b552236cf73 Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Fri, 1 Feb 2019 13:07:42 +0100
Subject: cpu/x86/msr: Move IA32_MISC_ENABLE bits to common place

Change-Id: I51aa300358013cb0e76704feb2115d2a7e260f8a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31193
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Guckian
Reviewed-by: Vanny E <vanessa.f.eusebio@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/denverton_ns/include/soc/msr.h | 4 ----
 1 file changed, 4 deletions(-)

(limited to 'src/soc/intel/denverton_ns')

diff --git a/src/soc/intel/denverton_ns/include/soc/msr.h b/src/soc/intel/denverton_ns/include/soc/msr.h
index 1b27eefcaa..0d469c4871 100644
--- a/src/soc/intel/denverton_ns/include/soc/msr.h
+++ b/src/soc/intel/denverton_ns/include/soc/msr.h
@@ -96,10 +96,6 @@
 #define SMRR_SUPPORTED (1 << 11)
 #define PRMRR_SUPPORTED (1 << 12)
 
-/* IA32_MISC_ENABLE bits */
-#define FAST_STRINGS_ENABLE_BIT (1 << 0)
-#define SPEED_STEP_ENABLE_BIT (1 << 16)
-
 /* Read BCLK from MSR */
 unsigned int bus_freq_khz(void);
 
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