From 13f66507afdcde5170546e5ca1ce5a945895eb10 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sun, 3 Mar 2019 08:01:05 +0200
Subject: device/mmio.h: Add include file for MMIO ops
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MMIO operations are arch-agnostic so the include
path should not be arch/.

Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31691
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/denverton_ns/bootblock/uart.c | 2 +-
 src/soc/intel/denverton_ns/gpio_dnv.c       | 2 +-
 src/soc/intel/denverton_ns/lpc.c            | 1 +
 src/soc/intel/denverton_ns/romstage.c       | 1 +
 src/soc/intel/denverton_ns/sata.c           | 2 +-
 src/soc/intel/denverton_ns/soc_util.c       | 2 +-
 src/soc/intel/denverton_ns/systemagent.c    | 2 +-
 7 files changed, 7 insertions(+), 5 deletions(-)

(limited to 'src/soc/intel/denverton_ns')

diff --git a/src/soc/intel/denverton_ns/bootblock/uart.c b/src/soc/intel/denverton_ns/bootblock/uart.c
index c0aa25fca9..955bf4b936 100644
--- a/src/soc/intel/denverton_ns/bootblock/uart.c
+++ b/src/soc/intel/denverton_ns/bootblock/uart.c
@@ -14,7 +14,7 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <fsp/soc_binding.h>
diff --git a/src/soc/intel/denverton_ns/gpio_dnv.c b/src/soc/intel/denverton_ns/gpio_dnv.c
index b8576ae357..b083768a54 100644
--- a/src/soc/intel/denverton_ns/gpio_dnv.c
+++ b/src/soc/intel/denverton_ns/gpio_dnv.c
@@ -16,7 +16,7 @@
 
 #include <stdint.h>
 #include <string.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index 5f16f04393..c937709255 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -19,6 +19,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c
index 73c8269b01..77364b80d2 100644
--- a/src/soc/intel/denverton_ns/romstage.c
+++ b/src/soc/intel/denverton_ns/romstage.c
@@ -21,6 +21,7 @@
 #include <cpu/x86/mtrr.h>
 #include <device/pci_ops.h>
 #include <soc/fiamux.h>
+#include <device/mmio.h>
 #include <soc/iomap.h>
 #include <soc/pci_devs.h>
 #include <soc/pcr.h>
diff --git a/src/soc/intel/denverton_ns/sata.c b/src/soc/intel/denverton_ns/sata.c
index 844a037afa..ad62e51a68 100644
--- a/src/soc/intel/denverton_ns/sata.c
+++ b/src/soc/intel/denverton_ns/sata.c
@@ -15,7 +15,7 @@
  *
  */
 
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
diff --git a/src/soc/intel/denverton_ns/soc_util.c b/src/soc/intel/denverton_ns/soc_util.c
index fcfeaf7fb2..1e44021d92 100644
--- a/src/soc/intel/denverton_ns/soc_util.c
+++ b/src/soc/intel/denverton_ns/soc_util.c
@@ -15,7 +15,7 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <device/pci.h>
 #include <device/pci_def.h>
diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c
index 65cbbfb81a..22eae36ac3 100644
--- a/src/soc/intel/denverton_ns/systemagent.c
+++ b/src/soc/intel/denverton_ns/systemagent.c
@@ -17,7 +17,7 @@
 
 #include <console/console.h>
 #include <arch/acpi.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <stdint.h>
 #include <delay.h>
-- 
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