From 46e68ac99adb0a7c83c39842679636081c4d77a9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Mon, 4 Nov 2019 22:07:29 +0100 Subject: soc/intel/denverton_ns: make use of common cbmem_top_chipset MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This replaces denverton_ns's own implementation of cbmem_top_chipset and selects the common code one. Change-Id: Idae96aabe2807e465bb7ab0f29910757d0346ce9 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/36619 Reviewed-by: Arthur Heymans Reviewed-by: Nico Huber Reviewed-by: David Guckian Tested-by: build bot (Jenkins) --- src/soc/intel/denverton_ns/memmap.c | 24 ------------------------ 1 file changed, 24 deletions(-) (limited to 'src/soc/intel/denverton_ns/memmap.c') diff --git a/src/soc/intel/denverton_ns/memmap.c b/src/soc/intel/denverton_ns/memmap.c index b4761dbeef..c30f0e98c9 100644 --- a/src/soc/intel/denverton_ns/memmap.c +++ b/src/soc/intel/denverton_ns/memmap.c @@ -38,30 +38,6 @@ static inline uintptr_t system_agent_region_base(size_t reg) return ALIGN_DOWN(pci_read_config32(dev, reg), 1 * MiB); } -/* Returns min power of 2 >= size */ -static inline u32 power_of_2(u32 size) -{ - return size ? 1 << (1 + log2(size - 1)) : 0; -} - -u32 top_of_32bit_ram(void) -{ - u32 iqat_region_size = 0; - u32 tseg_region_size = system_agent_region_base(TOLUD) - - system_agent_region_base(TSEGMB); - -/* - * Add IQAT region size if enabled. - */ -#if CONFIG(IQAT_ENABLE) - iqat_region_size = CONFIG_IQAT_MEMORY_REGION_SIZE; -#endif - return system_agent_region_base(TOLUD) - - power_of_2(iqat_region_size + tseg_region_size); -} - -void *cbmem_top_chipset(void) { return (void *)top_of_32bit_ram(); } - static inline uintptr_t smm_region_start(void) { return system_agent_region_base(TSEGMB); -- cgit v1.2.3