From e4fc65bf746fe79babd03ce4d8efc54219b471b4 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 7 May 2020 07:26:54 +0200 Subject: soc/intel: Replace GPLv2 long form headers with SPDX header Change-Id: I468d2ba85033c41ba53333ebbfd6f4108a36e407 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/41130 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/denverton_ns/include/soc/romstage.h | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) (limited to 'src/soc/intel/denverton_ns/include') diff --git a/src/soc/intel/denverton_ns/include/soc/romstage.h b/src/soc/intel/denverton_ns/include/soc/romstage.h index 66f86ee0cc..4b1a1e5bbb 100644 --- a/src/soc/intel/denverton_ns/include/soc/romstage.h +++ b/src/soc/intel/denverton_ns/include/soc/romstage.h @@ -1,17 +1,5 @@ /* This file is part of the coreboot project. */ -/* - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef _SOC_DENVERTON_NS_ROMSTAGE_H_ #define _SOC_DENVERTON_NS_ROMSTAGE_H_ -- cgit v1.2.3