From 3065157da825ee2389e05875f78178957ee9dd75 Mon Sep 17 00:00:00 2001 From: Julien Viard de Galbert Date: Thu, 8 Mar 2018 16:26:41 +0100 Subject: soc/intel/denverton_ns: Initialize thermal configuration Change-Id: I7e1b924154256f8f82ded3d0fa155b3e836d9375 Signed-off-by: Julien Viard de Galbert Reviewed-on: https://review.coreboot.org/c/coreboot/+/25439 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/denverton_ns/include/soc/msr.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/denverton_ns/include') diff --git a/src/soc/intel/denverton_ns/include/soc/msr.h b/src/soc/intel/denverton_ns/include/soc/msr.h index 1f64235a14..89caf44c17 100644 --- a/src/soc/intel/denverton_ns/include/soc/msr.h +++ b/src/soc/intel/denverton_ns/include/soc/msr.h @@ -22,6 +22,8 @@ #define MSR_FLEX_RATIO 0x194 #define FLEX_RATIO_LOCK (1 << 20) #define FLEX_RATIO_EN (1 << 16) +/* IA32_MISC_ENABLE 0x1a0 */ +#define THERMAL_MONITOR_ENABLE_BIT (1 << 3) #define MSR_MISC_PWR_MGMT 0x1aa #define MISC_PWR_MGMT_EIST_HW_DIS (1 << 0) #define MSR_TURBO_RATIO_LIMIT 0x1ad -- cgit v1.2.3