From ba15a598b0415c6adfd9a5d3a37f1693cc11b5b0 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 28 Oct 2021 10:14:31 +0200 Subject: soc/intel/denverton_ns: Fetch addr bits at runtime MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ic46a7d56cbaf45724ebc2a1911f5096af2fe461a Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/58687 Tested-by: build bot (Jenkins) Reviewed-by: Mariusz Szafrański Reviewed-by: Angel Pons --- src/soc/intel/denverton_ns/acpi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/denverton_ns/acpi.c') diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index 82b8cf111f..ab6e7cc14d 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -4,6 +4,7 @@ #include #include #include +#include #include #include #include @@ -60,7 +61,7 @@ void soc_fill_gnvs(struct global_nvs *gnvs) gnvs->mmiob = (u32)get_top_of_low_memory(); gnvs->mmiol = (u32)(get_pciebase() - 1); gnvs->mmiohb = (u64)get_top_of_upper_memory(); - gnvs->mmiohl = (u64)(((u64)1 << CONFIG_CPU_ADDR_BITS) - 1); + gnvs->mmiohl = (u64)(((u64)1 << cpu_phys_address_size()) - 1); gnvs->tsegb = (u32)get_tseg_memory(); gnvs->tsegl = (u32)(get_top_of_low_memory() - get_tseg_memory()); } -- cgit v1.2.3