From eaf71b0778fb928850d6cb1323994e7cc35e3278 Mon Sep 17 00:00:00 2001 From: Ethan Tsao Date: Wed, 13 Oct 2021 12:37:05 -0700 Subject: soc/intel/common/acpi: Correct IPC sub command for reading LPM requirement Modify IPC sub command to 2 from 0 for reading LPM requirement from PMC. Reference: https://github.com/otcshare/CCG-ADL-Generic-Full ClientOneSiliconPkg\Include\Register\PmcRegs.h #define V_PMC_PWRM_IPC_SUBCMD_GEN_COMM_READ 2 It is consumed in below. ClientOneSiliconPkg\IpBlock\Pmc\Library\PeiDxeSmmPmcLib\PmcLib.c Change-Id: I58509f14f1e67472adda78e65c3a2e3ee9210765 Signed-off-by: Ethan Tsao Reviewed-on: https://review.coreboot.org/c/coreboot/+/58317 Tested-by: build bot (Jenkins) Reviewed-by: Wonkyu Kim Reviewed-by: Tim Wawrzynczak --- src/soc/intel/common/block/acpi/pep.c | 3 ++- src/soc/intel/common/block/include/intelblocks/pmc_ipc.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/acpi/pep.c b/src/soc/intel/common/block/acpi/pep.c index fe38a36775..9774239a69 100644 --- a/src/soc/intel/common/block/acpi/pep.c +++ b/src/soc/intel/common/block/acpi/pep.c @@ -47,7 +47,8 @@ static void read_pmc_lpm_requirements(const struct soc_pmc_lpm *lpm, const uint32_t offset = lpm->lpm_ipc_offset + i * lpm->req_reg_stride + j * sizeof(uint32_t); - const uint32_t cmd_reg = pmc_make_ipc_cmd(PMC_IPC_CMD_RD_PMC_REG, 0, 0); + const uint32_t cmd_reg = pmc_make_ipc_cmd(PMC_IPC_CMD_RD_PMC_REG, + PMC_IPC_CMD_SUBCMD_RD_PMC_REG, 0); struct pmc_ipc_buffer req = {.buf[0] = offset}; struct pmc_ipc_buffer res = {}; diff --git a/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h b/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h index 1877fe43fb..485833d8c4 100644 --- a/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h +++ b/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h @@ -40,6 +40,7 @@ /* IPC command for reading PMC registers */ #define PMC_IPC_CMD_RD_PMC_REG 0xA0 +#define PMC_IPC_CMD_SUBCMD_RD_PMC_REG 0x02 /* IPC command to enable/disable PCIe SRCCLK */ #define PMC_IPC_CMD_ID_SET_PCIE_CLOCK 0xAC -- cgit v1.2.3