From dc1e6bc2774e0fad2eec31d281c4e3ed22c16fe7 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Tue, 15 Aug 2017 13:32:26 -0700 Subject: intel/common/block/fast_spi: Add config option to disable write status Chrome OS systems rely on the write status register to enable/disable flash write protection and disabling this opcode breaks the ability to enable or disable write protection with flashrom. Add a configure option for this feature that will disable the opcode for Write Status commands unless CONFIG_CHROMEOS is enabled. Tested to ensure that a default build without CONFIG_CHROMEOS has this option enabled while a build with CONFIG_CHROMEOS does not. Also ensured that when this option is disabled (for Chrome OS) then flashrom can be used with the --wp-enable and --wp-disable commands, depending on the state of the external write protect pin. Change-Id: Ia2ef3c3b1e10fba2c437e083f3537022f1fce84a Signed-off-by: Duncan Laurie Reviewed-on: https://review.coreboot.org/21021 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Subrata Banik --- src/soc/intel/common/block/fast_spi/Kconfig | 8 ++++++++ src/soc/intel/common/block/fast_spi/fast_spi.c | 5 ++++- 2 files changed, 12 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/fast_spi/Kconfig b/src/soc/intel/common/block/fast_spi/Kconfig index 87edb92095..4bd1f59de6 100644 --- a/src/soc/intel/common/block/fast_spi/Kconfig +++ b/src/soc/intel/common/block/fast_spi/Kconfig @@ -2,3 +2,11 @@ config SOC_INTEL_COMMON_BLOCK_FAST_SPI bool help Intel Processor common FAST_SPI support + +config FAST_SPI_DISABLE_WRITE_STATUS + bool "Disable write status SPI opcode" + depends on SOC_INTEL_COMMON_BLOCK_FAST_SPI + default n if CHROMEOS + default y + help + Disable the write status SPI opcode in Intel Fast SPI block. diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index fe0217adad..f7ef68561f 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -144,7 +144,10 @@ void fast_spi_set_opcode_menu(void) void fast_spi_lock_bar(void) { void *spibar = fast_spi_get_bar(); - const uint16_t hsfs = SPIBAR_HSFSTS_FLOCKDN | SPIBAR_HSFSTS_WRSDIS; + uint16_t hsfs = SPIBAR_HSFSTS_FLOCKDN; + + if (IS_ENABLED(CONFIG_FAST_SPI_DISABLE_WRITE_STATUS)) + hsfs |= SPIBAR_HSFSTS_WRSDIS; write16(spibar + SPIBAR_HSFSTS_CTL, hsfs); } -- cgit v1.2.3