From c7c8cf2edd713fd578423bc043403ae4f91e2e29 Mon Sep 17 00:00:00 2001 From: Tony Huang Date: Tue, 25 Jun 2024 15:57:44 +0800 Subject: soc/intel/common: Extend WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS to 1500ms Some dongles require more time to be ready, this CL extedns the DP mode entry timeout from 0.5s to 1.5s and make sure the tested dongle display works. Before: [WARN ] DP not ready after 500ms. Abort. After: [INFO ] DP ready after 1211 ms BUG=b:348309582 TEST=emerge coreboot verify tested dongles and monitors display works Change-Id: I22d7800b50f6f7de9f147ae6998a5015d0dc0be9 Signed-off-by: Tony Huang Reviewed-on: https://review.coreboot.org/c/coreboot/+/83206 Reviewed-by: Derek Huang Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/intel/common/block/tcss/tcss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/tcss/tcss.c b/src/soc/intel/common/block/tcss/tcss.c index 1c4b9b391f..5ebc12968d 100644 --- a/src/soc/intel/common/block/tcss/tcss.c +++ b/src/soc/intel/common/block/tcss/tcss.c @@ -21,7 +21,7 @@ #define BIAS_CTRL_VW_INDEX_SHIFT 16 #define BIAS_CTRL_BIT_POS_SHIFT 8 #define WAIT_FOR_DISPLAYPORT_TIMEOUT_MS 1000 -#define WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS 500 +#define WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS 1500 #define WAIT_FOR_HPD_TIMEOUT_MS 3000 static uint32_t tcss_make_conn_cmd(int u, int u3, int u2, int ufp, int hsl, -- cgit v1.2.3