From b6b1b237eba2d1b817185a32b8bb3f242f3db2b5 Mon Sep 17 00:00:00 2001 From: Youness Alaoui Date: Thu, 22 Jun 2017 15:43:49 -0400 Subject: console/flashconsole: Enable support for postcar If FSP 2.0 is used, then postcar stage is used and the flashconsole as well as spi drivers needed to be added. Change-Id: I46d720a9d1fe18a95c9407d08dae1eb70ae6720e Signed-off-by: Youness Alaoui Reviewed-on: https://review.coreboot.org/21959 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/gspi/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/gspi/Makefile.inc b/src/soc/intel/common/block/gspi/Makefile.inc index 85cb18ebb8..2eb13fa347 100644 --- a/src/soc/intel/common/block/gspi/Makefile.inc +++ b/src/soc/intel/common/block/gspi/Makefile.inc @@ -2,3 +2,4 @@ bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c -- cgit v1.2.3