From 7cfdb3bc1a59280c1aeb2506e60384c42e05f6de Mon Sep 17 00:00:00 2001 From: Yuchi Chen Date: Fri, 8 Nov 2024 14:18:08 +0800 Subject: soc/intel/common/block/gpmr: Disable GPMR regs if ext-BIOS is disabled General Purpose Memory Range registers are only used if extended BIOS region is enabled now, this patch wraps the related code with Kconfig item `CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW`. Change-Id: I975840684b3dd9e9e76ec6a08de12d8dd3c8f08a Signed-off-by: Yuchi Chen Reviewed-on: https://review.coreboot.org/c/coreboot/+/85041 Tested-by: build bot (Jenkins) Reviewed-by: Shuo Liu --- src/soc/intel/common/block/gpmr/Kconfig | 2 +- src/soc/intel/common/block/gpmr/gpmr.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/gpmr/Kconfig b/src/soc/intel/common/block/gpmr/Kconfig index 313b0ccb53..920830ff45 100644 --- a/src/soc/intel/common/block/gpmr/Kconfig +++ b/src/soc/intel/common/block/gpmr/Kconfig @@ -12,6 +12,6 @@ config USE_SOC_GPMR_DEFS bool default n help - Specify if the SoC have specific GPMR register definitions. + Specify if the SoC has specific GPMR register definitions. endif diff --git a/src/soc/intel/common/block/gpmr/gpmr.c b/src/soc/intel/common/block/gpmr/gpmr.c index cef2e57dfa..53682ae486 100644 --- a/src/soc/intel/common/block/gpmr/gpmr.c +++ b/src/soc/intel/common/block/gpmr/gpmr.c @@ -33,6 +33,7 @@ void gpmr_or32(uint16_t offset, uint32_t ordata) return pcr_or32(PID_DMI, offset, ordata); } +#if CONFIG(FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW) /* Check for available free gpmr */ static int get_available_gpmr(void) { @@ -85,3 +86,4 @@ enum cb_err enable_gpmr(uint32_t base, uint32_t size, uint32_t dest_id) return CB_SUCCESS; } +#endif -- cgit v1.2.3