From 756646757e6608934bc544c0e066443f9c428c79 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Wed, 1 Jan 2020 17:42:45 +0200 Subject: lib/spd_bin,soc/intel/common: Move get_spd_smbus() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only smbuslib.c and spd_bin.c share the same prototypes for SMBUS functions. Therefore, get_spd_smbus() currently only works with soc/intel/.../smbuslib.c and can be implemented there locally. This allows removal of . Change-Id: Ic2d9d83ede6388a01d40c6e4768f6bb6bf899c00 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/38121 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/common/block/smbus/smbuslib.c | 77 +++++++++++++++++++++++++++-- 1 file changed, 73 insertions(+), 4 deletions(-) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/smbus/smbuslib.c b/src/soc/intel/common/block/smbus/smbuslib.c index e2df73025f..0680ce2b8e 100644 --- a/src/soc/intel/common/block/smbus/smbuslib.c +++ b/src/soc/intel/common/block/smbus/smbuslib.c @@ -14,8 +14,10 @@ */ #include -#include +#include #include +#include +#include #include #include "smbuslib.h" @@ -176,17 +178,84 @@ int do_smbus_read_word(unsigned int smbus_base, u8 device, unsigned int address) return data; } -u16 smbus_read_word(u8 addr, u8 offset) +static u16 smbus_read_word(u8 addr, u8 offset) { return do_smbus_read_word(SMBUS_IO_BASE, addr, offset); } -u8 smbus_read_byte(u8 addr, u8 offset) +static u8 smbus_read_byte(u8 addr, u8 offset) { return do_smbus_read_byte(SMBUS_IO_BASE, addr, offset); } -u8 smbus_write_byte(u8 addr, u8 offset, u8 value) +static u8 smbus_write_byte(u8 addr, u8 offset, u8 value) { return do_smbus_write_byte(SMBUS_IO_BASE, addr, offset, value); } + +static void update_spd_len(struct spd_block *blk) +{ + u8 i, j = 0; + for (i = 0 ; i < CONFIG_DIMM_MAX; i++) + if (blk->spd_array[i] != NULL) + j |= blk->spd_array[i][SPD_DRAM_TYPE]; + + /* If spd used is DDR4, then its length is 512 byte. */ + if (j == SPD_DRAM_DDR4) + blk->len = SPD_PAGE_LEN_DDR4; + else + blk->len = SPD_PAGE_LEN; +} + +static void smbus_read_spd(u8 *spd, u8 addr) +{ + u16 i; + u8 step = 1; + + if (CONFIG(SPD_READ_BY_WORD)) + step = sizeof(uint16_t); + + for (i = 0; i < SPD_PAGE_LEN; i += step) { + if (CONFIG(SPD_READ_BY_WORD)) + ((u16*)spd)[i / sizeof(uint16_t)] = + smbus_read_word(addr, i); + else + spd[i] = smbus_read_byte(addr, i); + } +} + +static void get_spd(u8 *spd, u8 addr) +{ + if (smbus_read_byte(addr, 0) == 0xff) { + printk(BIOS_INFO, "No memory dimm at address %02X\n", + addr << 1); + /* Make sure spd is zeroed if dimm doesn't exist. */ + memset(spd, 0, CONFIG_DIMM_SPD_SIZE); + return; + } + smbus_read_spd(spd, addr); + + /* Check if module is DDR4, DDR4 spd is 512 byte. */ + if (spd[SPD_DRAM_TYPE] == SPD_DRAM_DDR4 && + CONFIG_DIMM_SPD_SIZE > SPD_PAGE_LEN) { + /* Switch to page 1 */ + smbus_write_byte(SPD_PAGE_1, 0, 0); + smbus_read_spd(spd + SPD_PAGE_LEN, addr); + /* Restore to page 0 */ + smbus_write_byte(SPD_PAGE_0, 0, 0); + } +} + +static u8 spd_data[CONFIG_DIMM_MAX * CONFIG_DIMM_SPD_SIZE]; + +void get_spd_smbus(struct spd_block *blk) +{ + u8 i; + for (i = 0 ; i < CONFIG_DIMM_MAX; i++) { + get_spd(&spd_data[i * CONFIG_DIMM_SPD_SIZE], + blk->addr_map[i]); + blk->spd_array[i] = &spd_data[i * CONFIG_DIMM_SPD_SIZE]; + } + + update_spd_len(blk); +} -- cgit v1.2.3