From 6dc9d0352e9c2dafb46c8c827d07cfdba2d744dd Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sun, 16 Feb 2020 16:22:52 +0100 Subject: treewide: capitalize 'BIOS' Also replace 'BIOS' by coreboot when the image is 'coreboot.rom'. Change-Id: I8303b7baa9671f19a036a59775026ffd63c85273 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/38932 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/common/block/fast_spi/fast_spi.c | 2 +- src/soc/intel/common/pch/lockdown/lockdown.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 019976ad8c..49284e9489 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -237,7 +237,7 @@ void fast_spi_cache_bios_region(void) /* LOCAL APIC default address is 0xFEE0000, bios_size over 16MB will * cause memory type conflict when setting memory type to write - * protection, so limit the cached bios region to be no more than 16MB. + * protection, so limit the cached BIOS region to be no more than 16MB. * */ bios_size = MIN(bios_size, 16 * MiB); if (bios_size <= 0) diff --git a/src/soc/intel/common/pch/lockdown/lockdown.c b/src/soc/intel/common/pch/lockdown/lockdown.c index 4a3209e03e..3fa6e77042 100644 --- a/src/soc/intel/common/pch/lockdown/lockdown.c +++ b/src/soc/intel/common/pch/lockdown/lockdown.c @@ -69,12 +69,12 @@ static void fast_spi_lockdown_cfg(int chipset_lockdown) /* Lock FAST_SPIBAR */ fast_spi_lock_bar(); - /* Set Bios Interface Lock, Bios Lock */ + /* Set BIOS Interface Lock, BIOS Lock */ if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) { - /* Bios Interface Lock */ + /* BIOS Interface Lock */ fast_spi_set_bios_interface_lock_down(); - /* Bios Lock */ + /* BIOS Lock */ fast_spi_set_lock_enable(); } } -- cgit v1.2.3