From 3e786b55463fc656fd3c23823b42b72591eb3d21 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Mon, 5 Aug 2019 21:12:33 +0200 Subject: soc/intel: Drop pmc_soc_restore_power_failure() Get rid of this function and its dangerous, weak implementation. Instead, call pmc_set_power_failure_state() directly from the SMI handler. Change-Id: I0718afc5db66447c93289643f9097a4257b10934 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/34727 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Tim Wawrzynczak Reviewed-by: Furquan Shaikh --- src/soc/intel/common/block/include/intelblocks/pmclib.h | 6 ------ src/soc/intel/common/block/pmc/pmclib.c | 12 ------------ src/soc/intel/common/block/smm/smihandler.c | 3 ++- 3 files changed, 2 insertions(+), 19 deletions(-) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h index 8947a22653..caf21f0ca6 100644 --- a/src/soc/intel/common/block/include/intelblocks/pmclib.h +++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h @@ -126,12 +126,6 @@ void pmc_clear_all_gpe_status(void); /* Clear status bits in Power and Reset Status (PRSTS) register */ void pmc_clear_prsts(void); -/* - * Set PMC register to know which state system should be after - * power reapplied - */ -void pmc_soc_restore_power_failure(void); - /* * Enable or disable global reset. If global reset is enabled, hard reset and * soft reset will trigger global reset, where both host and TXE are reset. diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c index ee99735547..7fb4d5e807 100644 --- a/src/soc/intel/common/block/pmc/pmclib.c +++ b/src/soc/intel/common/block/pmc/pmclib.c @@ -79,18 +79,6 @@ __weak uint32_t soc_get_smi_status(uint32_t generic_sts) return generic_sts; } -/* - * Set PMC register to know which state system should be after - * power reapplied - */ -__weak void pmc_soc_restore_power_failure(void) -{ - /* - * SoC code should set PMC config register in order to set - * MAINBOARD_POWER_ON bit as per EDS. - */ -} - int acpi_get_sleep_type(void) { struct chipset_power_state *ps; diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index 7aa69c5c65..abd699ac2b 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -221,7 +222,7 @@ void smihandler_southbridge_sleep( /* Disable all GPE */ pmc_disable_all_gpe(); /* Set which state system will be after power reapplied */ - pmc_soc_restore_power_failure(); + pmc_set_power_failure_state(false); /* also iterates over all bridges on bus 0 */ busmaster_disable_on_bus(0); -- cgit v1.2.3