From 1f33a0c799bac60b5bcc24481303ebbcdaf0e7d2 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 28 Sep 2018 19:49:43 +0530 Subject: soc/intel/common/pch: Select Kconfig for ITSS polarity configuration This patch selects Kconfig for Intel Core Platform in order to ensure proper ITSS IPCx programming. Change-Id: I81e75e17ceb23c364b78300c3950144be1580700 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/28790 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh --- src/soc/intel/common/block/gpio/Kconfig | 6 ++++-- src/soc/intel/common/pch/Kconfig | 1 + 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/gpio/Kconfig b/src/soc/intel/common/block/gpio/Kconfig index 6d712e9585..d229ea3e60 100644 --- a/src/soc/intel/common/block/gpio/Kconfig +++ b/src/soc/intel/common/block/gpio/Kconfig @@ -10,8 +10,10 @@ config DEBUG_SOC_COMMON_BLOCK_GPIO help This option enables GPIO debug messages -# Used in small core SOCs to invert the polarity as ITSS only takes -# active high signals +# Use to program Interrupt Polarity Control (IPCx) register +# Each bit represents IRQx Active High Polarity Disable configuration: +# when set to 1, the interrupt polarity associated with IRQx is inverted +# to appear as Active Low to IOAPIC and vice versa config SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG depends on SOC_INTEL_COMMON_BLOCK_GPIO bool diff --git a/src/soc/intel/common/pch/Kconfig b/src/soc/intel/common/pch/Kconfig index 1157eb4f27..2bf6d686d3 100644 --- a/src/soc/intel/common/pch/Kconfig +++ b/src/soc/intel/common/pch/Kconfig @@ -23,6 +23,7 @@ config PCH_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_EBDA select SOC_INTEL_COMMON_BLOCK_FAST_SPI select SOC_INTEL_COMMON_BLOCK_GPIO + select SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG select SOC_INTEL_COMMON_BLOCK_GRAPHICS select SOC_INTEL_COMMON_BLOCK_ITSS select SOC_INTEL_COMMON_BLOCK_I2C -- cgit v1.2.3