From 1044ebaa06d8932564fa3ca3b0c4fbd25a63d992 Mon Sep 17 00:00:00 2001 From: Keno Fischer Date: Fri, 7 Jun 2019 01:55:56 -0400 Subject: soc/intel: Add some missing MCH PCIe IDs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These are documented in the Intel Datasheet entitled "6th Generation Intel® Processor Datasheet for S-Platforms" "6th Generation Intel® Processor Datasheet for H-Platforms" (Volume 2) Without them, coreboot fails to properly inform the payload of the amount of available memory. Signed-off-by: Keno Fischer Change-Id: I5b810c6415c4aa0404e5fa318d2c8db292566b8a Reviewed-on: https://review.coreboot.org/c/coreboot/+/33286 Tested-by: build bot (Jenkins) Reviewed-by: ron minnich Reviewed-by: Patrick Rudolph Reviewed-by: Christian Walter Reviewed-by: Felix Held --- src/soc/intel/common/block/systemagent/systemagent.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 281a7f7655..a93db65af6 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -341,6 +341,9 @@ static const unsigned short systemagent_ids[] = { PCI_DEVICE_ID_INTEL_SKL_ID_Y, PCI_DEVICE_ID_INTEL_SKL_ID_ULX, PCI_DEVICE_ID_INTEL_SKL_ID_H, + PCI_DEVICE_ID_INTEL_SKL_ID_H_2, + PCI_DEVICE_ID_INTEL_SKL_ID_S_2, + PCI_DEVICE_ID_INTEL_SKL_ID_S_4, PCI_DEVICE_ID_INTEL_WHL_ID_Wx2, PCI_DEVICE_ID_INTEL_WHL_ID_Wx4, PCI_DEVICE_ID_INTEL_KBL_ID_S, -- cgit v1.2.3