From 0b34fc6f54074673099e267a0806c656afd68172 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 8 Jun 2017 10:52:58 -0500 Subject: soc/intel/common/fast_spi: support caching bios in ramstage After the MTRR solution has been calculated provide a way for code to call the same function, fast_spi_cache_bios_region(), in all stages. This is accomplished by using the ramstage temporary MTRR support. Change-Id: I84ec90be3a1b0d6ce84d9d8e12adc18148f8fcfb Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/20115 Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) Reviewed-by: Barnali Sarkar Reviewed-by: Paul Menzel --- src/soc/intel/common/block/fast_spi/fast_spi.c | 21 ++++++++++++++------- .../common/block/include/intelblocks/fast_spi.h | 4 +++- 2 files changed, 17 insertions(+), 8 deletions(-) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index a53499eba6..1ef929c77c 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -179,14 +179,10 @@ size_t fast_spi_get_bios_region(size_t *bios_size) void fast_spi_cache_bios_region(void) { - int mtrr; size_t bios_size; uint32_t alignment; - - mtrr = get_free_var_mtrr(); - - if (mtrr == -1) - return; + const int type = MTRR_TYPE_WRPROT; + uintptr_t base; /* Only the IFD BIOS region is memory mapped (at top of 4G) */ fast_spi_get_bios_region(&bios_size); @@ -197,7 +193,18 @@ void fast_spi_cache_bios_region(void) /* Round to power of two */ alignment = 1 << (log2_ceil(bios_size)); bios_size = ALIGN_UP(bios_size, alignment); - set_var_mtrr(mtrr, 4ULL*GiB - bios_size, bios_size, MTRR_TYPE_WRPROT); + base = 4ULL*GiB - bios_size; + + if (ENV_RAMSTAGE) { + mtrr_use_temp_range(base, bios_size, type); + } else { + int mtrr = get_free_var_mtrr(); + + if (mtrr == -1) + return; + + set_var_mtrr(mtrr, base, bios_size, type); + } } /* diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h index 6294001d23..b399e4d8fa 100644 --- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h +++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h @@ -57,7 +57,9 @@ void fast_spi_set_strap_msg_data(uint32_t soft_reset_data); */ size_t fast_spi_get_bios_region(size_t *bios_size); /* - * Cache the memory-mapped BIOS region as write-protect type. + * Cache the memory-mapped BIOS region as write-protect type. In ramstage + * this function needs to be called after the final MTRR solution has been + * calculated. */ void fast_spi_cache_bios_region(void); /* -- cgit v1.2.3