From 04a40379b0cbc96c25498ec69520cb7cd85f3fe4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 6 Jun 2021 08:04:28 +0300 Subject: sb,soc/intel: Set IOAPIC redirection entry count MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The number of redirection table entries (aka interrupt vectors) inside an I/O APIC may depend of the SKU, with the related register being of type read/write-once. Provide support utilities to either lock or set this registers value. Change-Id: I8da869ba390dd821b43032e4ccbc9291c39e6bab Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/55289 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Nico Huber Reviewed-by: Angel Pons --- src/soc/intel/common/block/lpc/lpc_lib.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c index 0268245f34..c2278df248 100644 --- a/src/soc/intel/common/block/lpc/lpc_lib.c +++ b/src/soc/intel/common/block/lpc/lpc_lib.c @@ -274,22 +274,16 @@ void lpc_disable_clkrun(void) pci_write_config8(PCH_DEV_LPC, LPC_PCCTL, pcctl & ~LPC_PCCTL_CLKRUN_EN); } +/* PCH I/O APIC redirection entries */ +#define PCH_REDIR_ETR 120 + /* Enable PCH IOAPIC */ void pch_enable_ioapic(void) { - uint32_t reg32; - /* PCH-LP has 120 redirection entries */ - const int redir_entries = 120; - set_ioapic_id((void *)IO_APIC_ADDR, 0x02); /* affirm full set of redirection table entries ("write once") */ - reg32 = io_apic_read((void *)IO_APIC_ADDR, 0x01); - - reg32 &= ~0x00ff0000; - reg32 |= (redir_entries - 1) << 16; - - io_apic_write((void *)IO_APIC_ADDR, 0x01, reg32); + ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR); } static const uint8_t pch_interrupt_routing[PIRQ_COUNT] = { -- cgit v1.2.3