From 9cd99a1524cd8c7cd6100cfc9d68e85eea5ac265 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 28 May 2018 16:12:03 +0530 Subject: soc/intel/common/pch: Add pch lockdown code pch lockdown functionality can be used by supported PCH. Right now pch lockdown functionality is applied for SPT (Skylake SOC) and CNP(Cannon Lake SOC) PCH. BUG=b:78109109 BRANCH=none TEST=Build and boot KBL and CNL platform. Change-Id: I0b81bbc54f737cb4e7120f44bbe705039b45ccb3 Signed-off-by: Maulik V Vaghela Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/25688 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/intel/common/pch/lockdown/Makefile.inc | 1 + 1 file changed, 1 insertion(+) create mode 100644 src/soc/intel/common/pch/lockdown/Makefile.inc (limited to 'src/soc/intel/common/pch/lockdown/Makefile.inc') diff --git a/src/soc/intel/common/pch/lockdown/Makefile.inc b/src/soc/intel/common/pch/lockdown/Makefile.inc new file mode 100644 index 0000000000..f4663f569a --- /dev/null +++ b/src/soc/intel/common/pch/lockdown/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN) += lockdown.c -- cgit v1.2.3