From d509ee55b6b91270b1369311e20cbc717ad7b4b4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Thu, 14 Jan 2021 00:09:11 +0100 Subject: soc/intel/apl: drop LPC pad configuration code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Drop LPC pad configuration code since all boards now do pad configuration on their own. The comment about LPC_CLKRUNB when using eSPI is moved to `Documentation/getting_started/gpio.md`. Change-Id: I710d6aee8c3b2c8282cd321cd0688b9b26abea07 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/49410 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/include/intelblocks/lpc_lib.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/soc/intel/common/block') diff --git a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h index 98318aced5..fc5ce8e357 100644 --- a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h +++ b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h @@ -65,8 +65,6 @@ each soc will need to define the init. */ void lpc_soc_init(struct device *dev); /* Fill up LPC IO resource structure inside SoC directory */ void pch_lpc_soc_fill_io_resources(struct device *dev); -/* Init LPC GPIO pads */ -void lpc_configure_pads(void); /* Set LPC BIOS Control BILD bit. */ void lpc_set_bios_interface_lock_down(void); /* Set LPC BIOS Control LE bit. */ -- cgit v1.2.3