From d4db36e672644ac7f528d12c5ce3539725456085 Mon Sep 17 00:00:00 2001 From: Rocky Phagura Date: Sat, 3 Apr 2021 08:49:32 -0700 Subject: src/intel/xeon_sp: add hardware error support (HEST) This patch adds the ACPI hardware error source table (HEST) support. This involves a few different parts: (1) The ACPI HEST table which is filled with the appropriate fields (2) Reserved memory which is used by runtime SW to provide error information. OS will not accept a HEST table with this memory set to 0. The ASL code to enable APEI bit will be submitted in a separate patch. Tested on DeltaLake mainboard with following options enabled SOC_INTEL_XEON_RAS After boot to Linux, the following will show in dmesg: HEST: Table parsing has been initialized Change-Id: If76b2af153616182cc053ca878f30fe056e9c8bd Signed-off-by: Rocky Phagura Reviewed-on: https://review.coreboot.org/c/coreboot/+/52090 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/soc/intel/common/block/acpi/acpi/globalnvs.asl | 1 + src/soc/intel/common/block/include/intelblocks/nvs.h | 1 + 2 files changed, 2 insertions(+) (limited to 'src/soc/intel/common/block') diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl index 161381f5e5..75215f8789 100644 --- a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl +++ b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl @@ -24,4 +24,5 @@ Field (GNVS, ByteAcc, NoLock, Preserve) UIOR, 8, // 0x2f - UART debug controller init on S3 resume A4GB, 64, // 0x30 - 0x37 Base of above 4GB MMIO Resource A4GS, 64, // 0x38 - 0x3f Length of above 4GB MMIO Resource + , 8, // 0x40 - 0x48 Hest log buffer (used in SMM, not ASL code) } diff --git a/src/soc/intel/common/block/include/intelblocks/nvs.h b/src/soc/intel/common/block/include/intelblocks/nvs.h index c98fa012d0..89b682e95e 100644 --- a/src/soc/intel/common/block/include/intelblocks/nvs.h +++ b/src/soc/intel/common/block/include/intelblocks/nvs.h @@ -26,6 +26,7 @@ struct __packed global_nvs { u8 uior; /* 0x2f - UART debug controller init on S3 resume */ u64 a4gb; /* 0x30 - 0x37 Base of above 4GB MMIO Resource */ u64 a4gs; /* 0x38 - 0x3f Length of above 4GB MMIO Resource */ + u64 hest_log_addr; /* 0x40 - 48 err log addr (used in SMM, not ASL code) */ }; #endif -- cgit v1.2.3