From b73d2476dc2c52ec3310ee50b86b25186f98d25c Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Mon, 12 Oct 2020 20:03:59 +0200 Subject: soc/intel/common: rewrite and clarify the Legacy 8254 Timer Kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The current Kconfig help text is confusing because it talks about enabling the Kconfig for disabling a UPD for disabling power gating. Rewrite and clarify the help text. Change-Id: I9637c549db1ce29f259708f316852fc2ae9e7c38 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/46302 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/common/block/timer/Kconfig | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'src/soc/intel/common/block') diff --git a/src/soc/intel/common/block/timer/Kconfig b/src/soc/intel/common/block/timer/Kconfig index a214ef016b..42613a8f84 100644 --- a/src/soc/intel/common/block/timer/Kconfig +++ b/src/soc/intel/common/block/timer/Kconfig @@ -8,7 +8,11 @@ config USE_LEGACY_8254_TIMER default y if PAYLOAD_SEABIOS || VGA_ROM_RUN default n help - This sets the FSP UPD to enable Legacy 8254 clock gating. As per - the FSP Integration guide Legacy 8254 timer clock gating UPD needs - to be disabled in order to boot SeaBIOS or run OpRom, - but should otherwise be enabled. + Setting this makes the Legacy 8254 Timer available by disabling + clock gating. This needs to be enabled in order to boot a legacy + BIOS or OS not supporting other timers like PM timer or TSC. + + While SeaBIOS does not require this timer anymore, it is needed + when OpRoms are being used. + + Disable this setting to save power, when the timer is not needed. -- cgit v1.2.3