From 887cf3017ac3e51d38bb0f65553b5d28da9ce1f1 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 15 Feb 2021 17:22:19 +0100 Subject: soc/intel/common: Drop unused `fast_spi_flash_read_wpsr` function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also remove one macro that was only used inside that function. Change-Id: Id798e08375c5757aa99288ca4a7df923309f4d67 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/50753 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/soc/intel/common/block/fast_spi/fast_spi_def.h | 2 -- .../intel/common/block/fast_spi/fast_spi_flash.c | 24 ---------------------- .../common/block/include/intelblocks/fast_spi.h | 5 ----- 3 files changed, 31 deletions(-) (limited to 'src/soc/intel/common/block') diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_def.h b/src/soc/intel/common/block/fast_spi/fast_spi_def.h index ce4eb2d7c2..6ec12dabb6 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi_def.h +++ b/src/soc/intel/common/block/fast_spi/fast_spi_def.h @@ -76,8 +76,6 @@ #define SPIBAR_HSFSTS_FDONE (1 << 0) #define SPIBAR_HSFSTS_W1C_BITS (0xff) -#define WPSR_MASK_SRP0_BIT 0x80 - /* Bit definitions for FADDR (0x08) register */ #define SPIBAR_FADDR_MASK 0x7FFFFFF diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c index da9949088e..59ad7b4a50 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c @@ -302,30 +302,6 @@ static int fast_spi_flash_probe(const struct spi_slave *dev, return 0; } -/* - * Minimal set of commands to read WPSR from FAST_SPI. - * Returns 0 on success, < 0 on failure. - */ -int fast_spi_flash_read_wpsr(u8 *sr) -{ - uint8_t rdsr; - int ret = 0; - - fast_spi_init(); - - /* sending NULL for spiflash struct parameter since we are not - * calling HWSEQ read_status() call via Probe. - */ - ret = fast_spi_flash_status(NULL, &rdsr); - if (ret) { - printk(BIOS_ERR, "SPI rdsr failed\n"); - return ret; - } - *sr = rdsr & WPSR_MASK_SRP0_BIT; - - return 0; -} - static int fast_spi_flash_ctrlr_setup(const struct spi_slave *dev) { if (dev->cs != 0) { diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h index e742a27a42..3ba240baf3 100644 --- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h +++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h @@ -9,11 +9,6 @@ * Disable the BIOS write protect and Enable Prefetching and Caching. */ void fast_spi_init(void); -/* - * Minimal set of commands to read WPSR from SPI. - * Returns 0 on success, < 0 on failure. - */ -int fast_spi_flash_read_wpsr(u8 *sr); /* * Set FAST_SPIBAR BIOS Control BILD bit. */ -- cgit v1.2.3