From 792ce8197355d01093c26335906bec8c5e7a2761 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 28 Apr 2023 00:52:23 +0530 Subject: soc/intel: Do CSE sync in romstage, unless ramstage chooses otherwise MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch makes CSE sync in romstage default enabled unless ramstage config (SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE) chooses to override it. TEST=Able to build google/marasov with this change where CSE sync is performed early inside romstage. Signed-off-by: Subrata Banik Change-Id: I3f5017fbcf917201eaf8233089050bd31c3d1917 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74805 Tested-by: build bot (Jenkins) Reviewed-by: Sridhar Siricilla Reviewed-by: Jérémy Compostella --- src/soc/intel/common/block/cse/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/common/block') diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index 1eb3eff8f1..26c623fe8d 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -248,7 +248,7 @@ config SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V2 config SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE bool - default y + default !SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE depends on SOC_INTEL_CSE_LITE_SKU && !SOC_INTEL_CSE_LITE_COMPRESS_ME_RW help Use default flow of CSE FW Update in romstage when uncompressed ME_RW blobs are used. -- cgit v1.2.3