From 29a92e87ca4ed27d2c3397f6f81af50820f0c43f Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 15 Aug 2022 15:16:43 +0530 Subject: soc/intel/common/block/cpu: API to check if TME is supported MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As per the Alder Lake FAS coreboot shall detect the existence of TME feature by running the CPUID instruction: CPUID leaf 7/sub-leaf 0 Return Value in ECX [bit 13]=1 If TME is supported then only access to TME MSRs are allowed otherwise accessing those MSRs would result in GP#. TEST=Able to detect the existence of TME feature across different Alder Lake and Meteor Lake CPU SKUs. Signed-off-by: Subrata Banik Change-Id: Ibd4fcf15a66d27748ac7fbb52b18d7264b901cd8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66749 Reviewed-by: Kapil Porwal Tested-by: build bot (Jenkins) Reviewed-by: Tarun Tuli --- src/soc/intel/common/block/cpu/cpulib.c | 9 +++++++++ src/soc/intel/common/block/include/intelblocks/cpulib.h | 8 ++++++++ src/soc/intel/common/block/include/intelblocks/msr.h | 1 + 3 files changed, 18 insertions(+) (limited to 'src/soc/intel/common/block') diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 0b91860dfd..9e4f7a27b0 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -501,3 +501,12 @@ void init_core_prmrr(void) if (msr.lo & MTRR_CAP_PRMRR) sync_core_prmrr(); } + +bool is_tme_supported(void) +{ + struct cpuid_result cpuid_regs; + + cpuid_regs = cpuid_ext(0x7, 0x0); /* ECX[13] is feature capability */ + + return (cpuid_regs.ecx & TME_SUPPORTED); +} diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index 0d489f4190..f0ebd09f82 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -194,4 +194,12 @@ void get_cpu_topology_from_apicid(uint32_t apicid, uint8_t *package, */ void init_core_prmrr(void); +/* + * Check if TME is supported by the CPU + * + * coreboot shall detect the existence of TME feature by running CPUID instruction: + * CPUID leaf 7/sub-leaf 0: Return Value in ECX [bit 13] = 1 + */ +bool is_tme_supported(void); + #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */ diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h index 8e56aa325b..a7ad699733 100644 --- a/src/soc/intel/common/block/include/intelblocks/msr.h +++ b/src/soc/intel/common/block/include/intelblocks/msr.h @@ -106,5 +106,6 @@ #define SMRR_LOCK_SUPPORTED (1<<14) #define SGX_SUPPORTED (1<<2) +#define TME_SUPPORTED (1<<13) #endif /* SOC_INTEL_COMMON_MSR_H */ -- cgit v1.2.3