From cc7cdb19b10fa9b51acf8bc0fa94d202ffa214f3 Mon Sep 17 00:00:00 2001 From: Karthikeyan Ramasubramanian Date: Wed, 20 Mar 2019 11:38:01 -0600 Subject: soc/intel/common: Move support to log XHCI wake events The policy to identify and log the XHCI wake events is similar between skylake and apollolake. Hence move the similar parts to a common location. BUG=b:123429132 BRANCH=None TEST=Ensure that the system boots to ChromeOS. Ensure that the wake up events due to USB are logged into the event logs. 6 | 2019-03-21 09:22:18 | S0ix Enter 7 | 2019-03-21 09:22:22 | S0ix Exit 8 | 2019-03-21 09:22:22 | Wake Source | PME - XHCI (USB 2.0 port) | 9 9 | 2019-03-21 09:22:22 | Wake Source | GPE # | 13 10 | 2019-03-21 09:23:20 | ACPI Enter | S3 11 | 2019-03-21 09:23:30 | Wake Source | PME - XHCI (USB 2.0 port) | 9 12 | 2019-03-21 09:23:30 | ACPI Wake | S3 13 | 2019-03-21 09:23:30 | Wake Source | GPE # | 13 Change-Id: Ia6643342e3292984e422ff3c3fcd4bc0d99f947e Signed-off-by: Karthikeyan Ramasubramanian Reviewed-on: https://review.coreboot.org/c/coreboot/+/31999 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/intel/common/block/xhci/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/soc/intel/common/block/xhci/Kconfig') diff --git a/src/soc/intel/common/block/xhci/Kconfig b/src/soc/intel/common/block/xhci/Kconfig index c8fd5fdbd1..59536bac0f 100644 --- a/src/soc/intel/common/block/xhci/Kconfig +++ b/src/soc/intel/common/block/xhci/Kconfig @@ -2,3 +2,11 @@ config SOC_INTEL_COMMON_BLOCK_XHCI bool help Intel Processor common XHCI support + +config SOC_INTEL_COMMON_BLOCK_XHCI_ELOG + bool + default n + depends on SOC_INTEL_COMMON_BLOCK_XHCI + help + Set this option to identify if XHCI caused a wake up and log that + information into the event log. -- cgit v1.2.3