From e26c4a461132087930e7137043ab6ada1b4147c7 Mon Sep 17 00:00:00 2001 From: praveen hodagatta pranesh Date: Thu, 20 Sep 2018 03:49:45 +0800 Subject: soc/intel/cannonlake: Add new cannon lake PCH-H support Cannon lake PCH-H is added to support coffee lake RVP11 and coffee lake RVP8 platforms. - Add new device IDs for LPC, PCIE, PMC, I2C, UART, SMBUS, XHCI, P2SB, SRAM, AUDIO, CSE0, XDCI, SD, MCH and graphics device. - Add new device IDs to intel common code respectively. - Add CPU, LPC, GD, MCH entry to report_platform.c to identify RVP11 & RVP8. - CNL PCH-H supports 24 pcie root ports and 4 I2C controllers, hence chip.c is modified accordingly. - Add board type UserBd UPD to BOARD_TYPE_DESKTOP for both RVP11 & RVP8. BUG=None TEST=successfully boot both CFL RVP11 & RVP8, verified all the enabled devices are enumerated and cross checked devices ids in serial logs and UEFI shell. Change-Id: I4b6af88d467382250aecb4102878b1c5af92ccd4 Signed-off-by: praveen hodagatta pranesh Reviewed-on: https://review.coreboot.org/28718 Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/uart/uart.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/intel/common/block/uart') diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index d964b90b38..5fb7da63a2 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -262,6 +262,9 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_GLK_UART1, PCI_DEVICE_ID_INTEL_GLK_UART2, PCI_DEVICE_ID_INTEL_GLK_UART3, + PCI_DEVICE_ID_INTEL_CNP_H_UART0, + PCI_DEVICE_ID_INTEL_CNP_H_UART1, + PCI_DEVICE_ID_INTEL_CNP_H_UART2, 0, }; -- cgit v1.2.3