From 3f4af0da938e0d9f4d80e77a3d8abd1f6400e57e Mon Sep 17 00:00:00 2001 From: Meera Ravindranath Date: Wed, 12 Feb 2020 16:01:22 +0530 Subject: soc/intel/common: Update Jasper Lake Device IDs Update Jasper Lake CPU, SA and PCH IDs. BUG=b:149185282 BRANCH=None TEST=Compilation for Jasper Lake board is working Change-Id: I2c9ec1eb4236184b981d99250f263172c82f7117 Signed-off-by: Meera Ravindranath Signed-off-by: Varshit Pandya Reviewed-on: https://review.coreboot.org/c/coreboot/+/38849 Tested-by: build bot (Jenkins) Reviewed-by: Aamir Bohra Reviewed-by: Wonkyu Kim --- src/soc/intel/common/block/uart/uart.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/soc/intel/common/block/uart') diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 08c0090b21..6f027e7af1 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -281,12 +281,12 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_TGP_UART0, PCI_DEVICE_ID_INTEL_TGP_UART1, PCI_DEVICE_ID_INTEL_TGP_UART2, - PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART0, - PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART1, - PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART2, PCI_DEVICE_ID_INTEL_MCC_UART0, PCI_DEVICE_ID_INTEL_MCC_UART1, PCI_DEVICE_ID_INTEL_MCC_UART2, + PCI_DEVICE_ID_INTEL_JSP_UART0, + PCI_DEVICE_ID_INTEL_JSP_UART1, + PCI_DEVICE_ID_INTEL_JSP_UART2, 0, }; -- cgit v1.2.3