From 2ec1c13ac4a9724095ce71783fd52f70a0b1536d Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 29 Apr 2020 09:57:05 +0200 Subject: soc/intel/common: Fix 16-bit read/write PCI_COMMAND register Change-Id: I09cc69a20dc67c0f48b35bfd2afeaba9e2ee5064 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/40843 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/intel/common/block/uart/uart.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/common/block/uart/uart.c') diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 7d75bdd62f..9498060c5e 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -68,7 +68,7 @@ void uart_common_init(const struct device *device, uintptr_t baseaddr) pci_write_config32(dev, PCI_BASE_ADDRESS_0, baseaddr); /* Enable memory access and bus master */ - pci_write_config32(dev, PCI_COMMAND, UART_PCI_ENABLE); + pci_write_config16(dev, PCI_COMMAND, UART_PCI_ENABLE); uart_lpss_init(device, baseaddr); } @@ -109,7 +109,7 @@ bool uart_is_controller_initialized(void) if (!base) return false; - if ((pci_read_config32(dev, PCI_COMMAND) & UART_PCI_ENABLE) + if ((pci_read_config16(dev, PCI_COMMAND) & UART_PCI_ENABLE) != UART_PCI_ENABLE) return false; -- cgit v1.2.3