From 571d07d45b51d1b20af29cad27390b83b82f0aba Mon Sep 17 00:00:00 2001 From: Maxim Polyakov Date: Thu, 22 Aug 2019 13:11:32 +0300 Subject: soc/intel/skylake: Add Lewisburg family PCH support This patch adds Lewisburg C62x Series PCH support by adding the Production and Super SKUs of the following PCI devices: - LPC or eSPI Controllers, - PCI Express Root Ports, - SSATA and SATA Controllers, - SMBus, - SPI Controller, - ME/HECI, - Audio, - P2SB, - Power Management Controller. These changes are in accordance with the documentation: [*] page 39, Intel(R) C620 Series Chipset Platform Controller Hub (PCH) Datasheet, May 2019. Document Number: 336067-007US Change-Id: I7eaf2c1bb725ffed66f86c023c415ad17fe5793d Signed-off-by: Maxim Polyakov Reviewed-on: https://review.coreboot.org/c/coreboot/+/35030 Tested-by: build bot (Jenkins) Reviewed-by: Lance Zhao --- src/soc/intel/common/block/spi/spi.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/common/block/spi/spi.c') diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c index af5087f716..365da2faa6 100644 --- a/src/soc/intel/common/block/spi/spi.c +++ b/src/soc/intel/common/block/spi/spi.c @@ -71,6 +71,8 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_CNP_H_SPI1, PCI_DEVICE_ID_INTEL_CNP_H_SPI2, PCI_DEVICE_ID_INTEL_CNP_H_HWSEQ_SPI, + PCI_DEVICE_ID_INTEL_LWB_SPI, + PCI_DEVICE_ID_INTEL_LWB_SPI_SUPER, PCI_DEVICE_ID_INTEL_ICP_SPI0, PCI_DEVICE_ID_INTEL_ICP_SPI1, PCI_DEVICE_ID_INTEL_ICP_SPI2, -- cgit v1.2.3