From 9970b61ad3049d87650cd7b4eb5f47d667098186 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 3 Aug 2019 23:18:01 +0300 Subject: arch/x86: Move TSEG_STAGE_CACHE implementation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is declared weak so that platforms that do not have smm_subregion() can provide their own implementation. Change-Id: Ide815b45cbc21a295b8e58434644e82920e84e31 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34704 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/intel/common/block/smm/smm.c | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'src/soc/intel/common/block/smm/smm.c') diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c index 489462dfa7..12c057b25a 100644 --- a/src/soc/intel/common/block/smm/smm.c +++ b/src/soc/intel/common/block/smm/smm.c @@ -22,18 +22,6 @@ #include #include #include -#include - -#if !CONFIG(PLATFORM_USES_FSP1_1) -void stage_cache_external_region(void **base, size_t *size) -{ - if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) { - printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n"); - *base = NULL; - *size = 0; - } -} -#endif void smm_southbridge_clear_state(void) { -- cgit v1.2.3