From 83e9823aec2a4510794851771b82429cf4d374e1 Mon Sep 17 00:00:00 2001 From: Shaunak Saha Date: Thu, 22 Jun 2017 10:38:30 -0700 Subject: soc/intel/common: Use common PMC for SMM Change-Id: I067b99415e882a24970140280d3b223eb1301e2d Signed-off-by: Shaunak Saha Reviewed-on: https://review.coreboot.org/20307 Reviewed-by: Aaron Durbin Tested-by: Aaron Durbin --- src/soc/intel/common/block/smm/smm.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'src/soc/intel/common/block/smm/smm.c') diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c index ab60af615d..41f3426c11 100644 --- a/src/soc/intel/common/block/smm/smm.c +++ b/src/soc/intel/common/block/smm/smm.c @@ -17,6 +17,7 @@ #include #include +#include #include #include @@ -24,24 +25,24 @@ void smm_southbridge_clear_state(void) { printk(BIOS_DEBUG, "Clearing SMI status registers\n"); - if (get_smi_en() & APMC_EN) { + if (pmc_get_smi_en() & APMC_EN) { printk(BIOS_INFO, "SMI# handler already enabled?\n"); return; } /* Dump and clear status registers */ - clear_smi_status(); - clear_pm1_status(); - clear_tco_status(); - clear_gpe_status(); + pmc_clear_smi_status(); + pmc_clear_pm1_status(); + pmc_clear_tco_status(); + pmc_clear_gpe_status(); } void smm_southbridge_enable(void) { printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ - enable_pm1(PWRBTN_EN | GBL_EN); - disable_gpe(PME_B0_EN); + pmc_enable_pm1(PWRBTN_EN | GBL_EN); + pmc_disable_gpe(PME_B0_EN); /* * Enable SMI generation: @@ -55,7 +56,7 @@ void smm_southbridge_enable(void) */ /* Enable SMI generation: */ - enable_smi(ENABLE_SMI_PARAMS); + pmc_enable_smi(ENABLE_SMI_PARAMS); } void smm_setup_structures(void *gnvs, void *tcg, void *smi1) -- cgit v1.2.3