From 6278867065e0849ba54ed7022fc9aab819daaaaf Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Thu, 17 Aug 2017 16:08:00 +0200 Subject: soc/intel/common/smbus: Don't clear random bits FSP might have done some settings for us there. Use pci_update_config32() since the register is documented to be 32 bits wide. Change-Id: I995e8a731a6958f10600174d031bb94f5a0a66db Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/21072 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/smbus/smbus.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/soc/intel/common/block/smbus') diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index 8ee38eeeb4..e526bafc79 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -53,12 +53,10 @@ static struct smbus_bus_operations lops_smbus_bus = { static void pch_smbus_init(device_t dev) { struct resource *res; - u16 reg16; /* Enable clock gating */ - reg16 = pci_read_config32(dev, 0x80); - reg16 &= ~((1 << 8)|(1 << 10)|(1 << 12)|(1 << 14)); - pci_write_config32(dev, 0x80, reg16); + pci_update_config32(dev, 0x80, + ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)), 0); /* Set Receive Slave Address */ res = find_resource(dev, PCI_BASE_ADDRESS_4); -- cgit v1.2.3