From 211be9c031d45cb394d92176c3819939b66c53cd Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 13 Apr 2022 12:13:09 +0530 Subject: soc/intel/cmn/{block, pch}: Migrate GPMR driver This patch migrates GPMR driver over DMI to accommodate future SOCs with different interface (other than PCR/DMI). TEST=Able to build and boot google/redrix. Signed-off-by: Wonkyu Kim Signed-off-by: Subrata Banik Change-Id: I00ac667e8d3f2ccefd8d51a8150a989fc8e5c7e2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63471 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- src/soc/intel/common/block/smbus/tco.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'src/soc/intel/common/block/smbus') diff --git a/src/soc/intel/common/block/smbus/tco.c b/src/soc/intel/common/block/smbus/tco.c index 518541b1ab..1ca88428ba 100644 --- a/src/soc/intel/common/block/smbus/tco.c +++ b/src/soc/intel/common/block/smbus/tco.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -16,10 +17,6 @@ #include #include -#define PCR_DMI_TCOBASE 0x2778 -/* Enable TCO I/O range decode. */ -#define TCOEN (1 << 1) - /* SMBUS TCO base address. */ #define TCOBASE 0x50 #define TCOCTL 0x54 @@ -122,10 +119,8 @@ static void tco_enable_bar(void) /* Enable TCO in SMBUS */ pci_write_config32(dev, TCOCTL, reg32 | TCO_BASE_EN); - /* - * Program "TCO Base Address" PCR[DMI] + 2778h[15:5, 1] - */ - pcr_write32(PID_DMI, PCR_DMI_TCOBASE, tcobase | TCOEN); + /* Program TCO Base Address */ + gpmr_write32(GPMR_TCOBASE, tcobase | GPMR_TCOEN); } /* -- cgit v1.2.3