From 6b5bf407deb52a900ef0a8a0b99f853be1eb7e82 Mon Sep 17 00:00:00 2001 From: Ravi Sarawadi Date: Mon, 21 Oct 2019 22:25:04 -0700 Subject: soc/intel/common: Include Tigerlake device IDs Add Tigerlake specific CPU, System Agent, PCH, IGD device IDs. BUG=None BRANCH=None TEST=Build 'emerge-tglrvp coreboot' Signed-off-by: Ravi Sarawadi Change-Id: I19047354718bdf510dffee4659d885f1313a751b Reviewed-on: https://review.coreboot.org/c/coreboot/+/36225 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph Reviewed-by: Subrata Banik --- src/soc/intel/common/block/pcie/pcie.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'src/soc/intel/common/block/pcie') diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c index c8ca4f4d87..406a227387 100644 --- a/src/soc/intel/common/block/pcie/pcie.c +++ b/src/soc/intel/common/block/pcie/pcie.c @@ -250,6 +250,22 @@ static const unsigned short pcie_device_ids[] = { PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP14, PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP15, PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP16, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP1, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP2, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP3, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP4, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP5, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP6, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP7, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP8, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP9, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP10, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP11, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP12, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP13, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP14, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP15, + PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP16, 0 }; -- cgit v1.2.3