From f3bf7d0fb70cea8a8fc880d62e00a09d1539e0f9 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Tue, 1 Aug 2017 12:06:08 -0700 Subject: soc/intel/common: Add lpss.c to ramstage BUG=b:64030366 Change-Id: I7e05d65ebb3b6499451242521ffc61fc4c952830 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/20850 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/lpss/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/common/block/lpss/Makefile.inc') diff --git a/src/soc/intel/common/block/lpss/Makefile.inc b/src/soc/intel/common/block/lpss/Makefile.inc index bb65bfea76..50d1c10850 100644 --- a/src/soc/intel/common/block/lpss/Makefile.inc +++ b/src/soc/intel/common/block/lpss/Makefile.inc @@ -1,3 +1,4 @@ bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c -- cgit v1.2.3