From c0199919e3621ff280094ee1325763c9e0c37284 Mon Sep 17 00:00:00 2001
From: Tim Wawrzynczak <twawrzynczak@chromium.org>
Date: Thu, 25 Jun 2020 10:01:46 -0600
Subject: soc/intel/common: Add a minimal PCI driver for IPU

Add a minimal PCI driver for Intel's IPU, this allows devices to be
added underneath it in the devicetree.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I531b293634a5d40112dc6af7b33fedb5e13f35e5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42812
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/common/block/ipu/ipu.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 src/soc/intel/common/block/ipu/ipu.c

(limited to 'src/soc/intel/common/block/ipu/ipu.c')

diff --git a/src/soc/intel/common/block/ipu/ipu.c b/src/soc/intel/common/block/ipu/ipu.c
new file mode 100644
index 0000000000..f7b01aa067
--- /dev/null
+++ b/src/soc/intel/common/block/ipu/ipu.c
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <device/pci.h>
+#include <device/pci_ids.h>
+
+struct device_operations ipu_pci_ops = {
+	.read_resources		= pci_bus_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_bus_enable_resources,
+	.scan_bus		= scan_generic_bus,
+	.ops_pci		= &pci_dev_ops_pci,
+};
+
+static const uint16_t pci_device_ids[] = {
+	PCI_DEVICE_ID_INTEL_TGL_IPU,
+	PCI_DEVICE_ID_INTEL_JSL_IPU,
+};
+
+static const struct pci_driver intel_ipu __pci_driver = {
+	.ops		= &ipu_pci_ops,
+	.vendor		= PCI_VENDOR_ID_INTEL,
+	.devices	= pci_device_ids,
+};
-- 
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