From d415c206b5a657f84a3ab68a272c1187dccc2e12 Mon Sep 17 00:00:00 2001 From: Sridhar Siricilla Date: Sat, 31 Aug 2019 14:54:57 +0530 Subject: src/soc/intel/{common,cnl,skl,icl}: Move global reset req function to common send_heci_reset_req_message() is defined in multiple places, hence move it to common code. TEST=Verified on CMLRVP/Hatch/Soraka/Bobba/Dragon Egg boards. Change-Id: I691fc0610356ef1f64ffa7cc4fe7a39b1344cc16 Signed-off-by: Rizwan Qureshi Signed-off-by: Sridhar Siricilla Reviewed-on: https://review.coreboot.org/c/coreboot/+/35228 Reviewed-by: V Sowmya Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/include/intelblocks/cse.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'src/soc/intel/common/block/include') diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 30d17c865a..1b08b4d4ea 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -106,7 +106,19 @@ void set_host_ready(void); */ uint8_t wait_cse_sec_override_mode(void); +/* + * Sends GLOBAL_RESET_REQ cmd to CSE.The reset type can be + * GLOBAL_RESET/HOST_RESET_ONLY/CSE_RESET_ONLY. + * Returns -1 on failure a 0 on success. + */ +int send_heci_reset_req_message(uint8_t rst_type); + #define BIOS_HOST_ADDR 0x00 #define HECI_MKHI_ADDR 0x07 +/* Command GLOBAL_RESET_REQ Reset Types */ +#define GLOBAL_RESET 1 +#define HOST_RESET_ONLY 2 +#define CSE_RESET_ONLY 3 + #endif // SOC_INTEL_COMMON_MSR_H -- cgit v1.2.3