From 517750745f7fa4c29771c8fc0e03aa1449e44518 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 15 Feb 2021 15:15:22 +0100 Subject: soc/intel/common/block/smm: Ignore PM1 and GPE0 events in SCI mode When the SCI_EN bit is set, PM1 and GPE0 events will trigger a SCI instead of a SMI#. However, SMI_STS bits PM1_STS and GPE0_STS can still be set. Therefore, when SCI_EN is set, ignore PM1 and GPE0 events in the SMI# handler, as these events have triggered a SCI. Do not ignore any other SMI# types, since they cannot cause a SCI. Note that these bits are reserved on APL and GLK. However, SoC-specific code already accounts for it. Thus, no special handling is needed here. Change-Id: I5998b6bd61d796101786b57f9094cdaf0c3dfbaa Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/50750 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Furquan Shaikh Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/include/intelblocks/smihandler.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/soc/intel/common/block/include') diff --git a/src/soc/intel/common/block/include/intelblocks/smihandler.h b/src/soc/intel/common/block/include/intelblocks/smihandler.h index 7cea1dd1ab..437c3215cf 100644 --- a/src/soc/intel/common/block/include/intelblocks/smihandler.h +++ b/src/soc/intel/common/block/include/intelblocks/smihandler.h @@ -46,8 +46,6 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void); */ extern const smi_handler_t southbridge_smi[32]; -#define SMI_HANDLER_SCI_EN(__bit) (1 << (__bit)) - /* * This function should be implemented in SOC specific code to handle * the SMI event on SLP_EN. The default functionality is provided in -- cgit v1.2.3