From f9cc6374f218789ae91dfc61f8d4494874908b5e Mon Sep 17 00:00:00 2001 From: Karthikeyan Ramasubramanian Date: Tue, 4 Aug 2020 16:38:58 -0600 Subject: soc/intel/common/cse_lite: Perform a board specific reset When CSE Lite jumps from RO to RW, global reset is initiated. When AP is reset as part of global reset, in some boards TPM initialization fails. This is because AP reset is not detected by TPM hosting an older firmware version. To signal TPMs running older firmware version about AP reset, a modified reset sequence needs to be performed. Hence add support to perform board-specific reset sequence. BUG=b:162290856, b:162386991 TEST=Ensure that the device boots to OS with the board-specific reset sequence when CSE Lite jumps from RO to RW with an older and newer Cr50 firmware. Change-Id: I8663e7f25461e58e45766e2ac00d752bfa191d8b Signed-off-by: Karthikeyan Ramasubramanian Reviewed-on: https://review.coreboot.org/c/coreboot/+/44187 Reviewed-by: Furquan Shaikh Reviewed-by: Nick Vaccaro Reviewed-by: Edward O'Callaghan Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/include/intelblocks/cse.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/intel/common/block/include/intelblocks') diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index a1dc3d9d56..5466ba6a74 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -219,4 +219,8 @@ uint8_t cse_wait_com_soft_temp_disable(void); * currently selected partition. */ void cse_fw_sync(void *unused); + +/* Perform a board-specific reset sequence for CSE RO<->RW jump */ +void cse_board_reset(void); + #endif // SOC_INTEL_COMMON_CSE_H -- cgit v1.2.3