From dbcf293211df0d698c0d14b8668f55dd8be36ed3 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 28 Nov 2018 15:29:00 +0100 Subject: soc/intel/common/lpc_lib: Add function to disable LPC Clock Run Needed to fix up FSP-S bug on Apollo Lake. Change-Id: If09fee07debb1f0de840b0c0bd7a65d338665f7c Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/29898 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/include/intelblocks/lpc_lib.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/common/block/include/intelblocks') diff --git a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h index e7b844fc4a..f77b8d5d71 100644 --- a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h +++ b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h @@ -97,6 +97,8 @@ void lpc_set_eiss(void); void lpc_set_serirq_mode(enum serirq_mode mode); /* Enable CLKRUN_EN for power gating LPC. */ void lpc_enable_pci_clk_cntl(void); +/* LPC Clock Run is a feature to stop LPC clock unless a peripheral objects. */ +void lpc_disable_clkrun(void); /* * Setup I/O Decode Range Register for LPC * ComA Range 3F8h-3FFh [2:0] -- cgit v1.2.3