From 6d2fbba0ed5436fc06112e6b9bc5386377cc82ff Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Tue, 6 Apr 2021 20:46:09 +0200 Subject: docs: correct and rewrite documentation regarding n/c / unused pads MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Intel PDGs starting from Skylake / Sunrise Point state that, different from the general recommendation in digital electronics, unconnected GPIOs defaulting to GPIO mode do explicitly not require termination. The reason for this is, that these GPIOs have the `GPIORXDIS` bit set, which effectively disconnects the pad from the internal logic by disabling the input buffer. This bit - besides `GPIOTXDIS` - can also be set explicitly by using the gpio macro `PAD_NC(pad, NONE)`. In some cases, a pull resistor may be required due to bad board design or when a vendor sets the RX/TX disable bits together with a pull resistor and schematics are not available to check if the pad is really unconnected or just unused. In this case the pull resistor should be kept. Pads defaulting to native functions usually don't need special handling. However, when pads requiring external pull-ups are missing these due to bad board design, they should be configured with `PAD_NC` to disconnect them internally. Rewrite the documentation to reflect these new findings. Also clarify the comment in soc/intel gpio code accordingly. Change-Id: Id01b197ebe8f2b8bb4ecf3d119ec2298b26d9be0 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/52139 Reviewed-by: Tim Crawford Reviewed-by: Felix Singer Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/include/intelblocks/gpio_defs.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/common/block/include/intelblocks') diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index e5a536d8b3..d3249bcbbb 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -301,9 +301,10 @@ PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, DRIVER) /* - * No Connect configuration for unused pad. + * No Connect configuration for unconnected or unused pad. * Both TX and RX are disabled. RX disabling is done to avoid unnecessary - * setting of GPI_STS. RX Level/Edge Trig Configuration set to disable + * setting of GPI_STS and to prevent triggering the internal logic by floating + * pads. */ #define PAD_NC(pad, pull) \ _PAD_CFG_STRUCT(pad, \ -- cgit v1.2.3