From 1c6ea92e6fcee21aa01a20500594a09ab14caa74 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Sat, 2 Nov 2019 12:20:53 +0100 Subject: soc/intel/common: pmclib: make use of the new ETR address API MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make use of the new ETR address API in the ETR3 register related functions. Further, disabling and locking of global reset is now done at once to save one read-modify-write cycle, thus the function was renamed accordingly and the now redundant disabling in soc/apl got removed. Change-Id: I49f59efb4a7c7d3d629ac54a7922bbcc8a87714d Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/36570 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/include/intelblocks/pmclib.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'src/soc/intel/common/block/include/intelblocks') diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h index 7cc501df7e..b622a74b9b 100644 --- a/src/soc/intel/common/block/include/intelblocks/pmclib.h +++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h @@ -133,10 +133,15 @@ void pmc_clear_prsts(void); */ void pmc_global_reset_enable(bool enable); /* - * If possible, lock 0xcf9. Once the register is locked, it can't be changed. - * This lock is reset on cold boot, hard reset, soft reset and Sx. + * Disable global reset and lock the CF9 global reset register in accordance to PCH ME BWG + * sections 4.4.1, 4.5.1 and 18.4 and the PCH datasheet(s) (Intel doc e.g. 332691-002EN, + * 332996-002EN). Deviate from the BGW we don't depend on the Intel ME state because Intel + * FPT (Flash Programming Tool) normally is not used with coreboot. + * + * Once the register is locked, it can't be changed. This lock is reset on cold boot, hard + * reset, soft reset and Sx. */ -void pmc_global_reset_lock(void); +void pmc_global_reset_disable_and_lock(void); /* Returns the power state structure */ struct chipset_power_state *pmc_get_power_state(void); -- cgit v1.2.3